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PIC18F66K80 FAMILY
DS39977F-page 154
2010-2012 Microchip Technology Inc.
REGISTER 10-6:
PIR3: PERIPHERAL INTERRUPT REQUEST (FLAG) REGISTER 3
U-0
R-0
R/W-0
U-0
—
RC2IF
TX2IF
CTMUIF
CCP2IF
CCP1IF
—
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 7-6
Unimplemented:
Read as ‘0’
bit 5
RC2IF:
EUSARTx Receive Interrupt Flag bit
1
= The EUSARTx receive buffer, RCREG2, is full (cleared when RCREG2 is read)
0
= The EUSARTx receive buffer is empty
bit 4
TX2IF:
EUSARTx Transmit Interrupt Flag bit
1
= The EUSARTx transmit buffer, TXREG2, is empty (cleared when TXREG2 is written)
0
= The EUSARTx transmit buffer is full
bit 3
CTMUIF:
CTMU Interrupt Flag bit
1
= CTMU interrupt occurred (must be cleared in software)
0
= No CTMU interrupt occurred
bit 2
CCP2IF:
CCP2 Interrupt Flag bit
Capture mode:
1
= A TMR1/TMR3 register capture occurred (must be cleared in software)
0
= No TMR1/TMR3 register capture occurred
Compare mode:
1
= A TMR1/TMR3 register compare match occurred (must be cleared in software)
0
= No TMR1/TMR3 register compare match occurred
PWM mode:
Unused in this mode.
bit 1
CCP1IF:
ECCP1 Interrupt Flag bit
Capture mode:
1
= A TMR1/TMR3 register capture occurred (must be cleared in software)
0
= No TMR1/TMR3 register capture occurred
Compare mode:
1
= A TMR1/TMR3 register compare match occurred (must be cleared in software)
0
= No TMR1/TMR3 register compare match occurred
PWM mode:
Unused in this mode.
bit 0
Unimplemented:
Read as ‘0’
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